(1) Field of the Invention
The present invention relates to semiconductor devices, more particularly, to a method of producing a metal oxide semiconductor field effect transistor (MOS FET). Furthermore, the present invention is applied to the formation of a semiconductor memory device comprising an MOS transistor and a capacitor (i.e., a so-called "one-transistor one-capacitor memory cell").
(2) Description of the Prior Art
A gate electrode of an MOS transistor is often made of polycrystalline silicon. In this case, a thin gate insulating layer (e.g., a silicon dioxide layer) is formed on a semiconductor substrate (e.g., a silicon wafer), then a polycrystalline silicon layer is formed on the gate insulating layer by a chemical vapor deposition (CVD) method. A photoresist layer is formed on the polycrystalline silicon layer, exposed through a photomask, and developed. The polycrystalline silicon layer and the gate insulating layer are selectively etched, using the photoresist layer as a mask, to form the polycrystalline silicon gate electrode. Impurities (e.g., boron, phosphorus) are then introduced to form heavily doped regions (i.e., a source region and a drain region) having a conductivity type which is opposite that of the semiconductor substrate. Namely, the source and drain regions are self-aligned to the gate electrode. Therefore, it is possible to produce a high density device (i.e., to increase the degree of integration of elements). In the case where the impurities are introduced by an ion-implantation method, it is necessary to anneal the doped regions (i.e., the source and drain regions) at an elevated temperature for activation of the introduced impurities and for repairing the crystalline damage. In another case, where the impurities are introduced by a thermal diffusion method, the semiconductor substrate is heated to an elevated temperature during the diffusion of impurities. Such an elevated temperature does not affect the polycrystalline silicon gate. Furthermore, it is possible to form easily an insulating layer covering the polycrystalline silicon gate by thermally oxidizing the polycrystalline silicon gate.
An MOS transistor having a polycrystalline silicon gate can, for example, be utilized to form a one-transistor one-capacitor memory cell (see V. Leo Rideout, One-Device Cells for Dynamic Random-Access Memories, IEEE Transactions on Electron Devices, Vol. ED-26, No. 6, PP. 839-852, June 1979). FIG. 1 illustrates one example of the various structures of one-transistor one-capacitor memory cells. The memory device of FIG. 1 comprises a p-type silicon semiconductor substrate 1, a field insulating layer (e.g., a thick silicon dioxide layer) 2, a gate insulating layer (e.g. a thin silicon dioxide layer) 3, a polycrystalline silicon gate electrode 4, n.sup.+ -type doped regions 5a and 5b which are formed by introducing n-type impurities into the semiconductor substrate 1 in a self-aligned manner using the gate electrode 4 as a mask, an insulating layer 6 (e.g., a silicon dioxide layer formed by thermally oxidizing the polycrystalline silicon gate electrode 4), a polycrystalline silicon capacitor plate 7, a phosphosilicate glass (PSG) insulating layer 8, and a conductive line 9 (e.g., of aluminum). The polycrystalline silicon gate electrode 4 serves as a word line, and the conductive line 9 serves as a bit line. The capacitor plate 7 is connected to a power source line (V.sub.DD).
The heavily-doped polycrystalline silicon of the gate electrode has a resistivity of 1-2.times.10.sup.-3 .OMEGA.cm (ohm centimeter), so that the increase in switching speed of the MOS transistor is limited. If the gate electrode is made of aluminum having a resistivity of 1-2.times.10.sup.-6 .OMEGA.cm, the switching speed can be increased. However, since the melting point of aluminum is 629.degree. C. and aluminum alloys with silicon at around 500.degree. C., a semiconductor device having an aluminum layer should not be heated to a temperature of more than about 500.degree. C. Therefore, in the fabrication of aluminum gate MOS transistors, aluminum gate electrodes are usually formed after the formation of source and drain regions. In this case, source and drain regions are not self-aligned to the gate electrode and the mask-to-mask misregistration tolerance should be taken into consideration. Accordingly, one cannot sufficiently increase the density of the semiconductor device.